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Firmware Upload

  1. Install drivers for Digilent JTAG HS-2
    cd /opt/Xilinx/Vivado/2015.4/data/xicom/cable_drivers/lin64/install_script/install_drivers/
    sudo ./install_drivers

  2. restart udev
    service udev restart

  3. Power and connect USB to PC
    lsusb: Bus 001 Device 004: ID 0403:6014 Future Technology Devices International, Ltd FT232H Single HS USB-UART/FIFO IC

  4. Flash bitfile and memory file

Starting the TLU

  1. Network
    • IP address of TLU: 
    • Setup local network
  2. Settings to remember
    • If you power cycle the TLU you need to re-configure the clock by setting CONFCLOCK=1 in the INI file.
    • Disable std print out: DISABLE_PRINT = 1
  3. Python Scripts
    • tbd
  4. EUDAQ 
    • tbd

Hardware debugging

in the attached picture I show what you should see inside the box. 
The FPGA will be different but what you actually want to see is the PCB. 
The connector J1 is shown in the red circle and should be easy to find and to probe. 
As mentioned, it should have 
3.3 V on pin 1 and 2 
GND on pin 3 
5 V on pin 15 
-5V on pin 16 
Pin 12 is the DATA for the I2C line 
Pin 14 is the CLOCK for the I2C line 
If you check any of those with a scope, you should see activity whenever you press the INIT button, 
because the FPGA will try to talk to the I2C slaves on the PCB.

Centos Laptop

teleuser / tu

teleadmin / b.b

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